Company Intel
Job Title Compiler Software Engineer
Reference 20070721-0385-6613
Posting Date 21 July 2007
Job Location Shanghai, China
Description In this position, you will be working at the Intel Communication Compilers and Tools software lab and be responsible for development and delivery of the Intel compiler or GCC compiler for various architectures. You will be responsible to architect, design, implement, and test compiler functionality and tune for performance.
Qualifications You must possess a Bachelor's degree or a Master's degree in Computer Science with at least two years of experience in compiler projects. Additional qualifications include:
- Strong technical knowledge and English communication skills and a proven track record of development of software products
- Understanding of the entire product life cycle from definition through software development, design, implementation, quality assurance, and release
- Experience in compiler development and debugging, experience in performance tuning and big application optimization would be an added advantage
- Prior experience developing system software for GCC on Intel architectures (x86, EM64T) and experience on communicating with the open source development community would be an added advantage
- Advanced C and/or C++, Java*, Windows*, Linux*, QNX*, CVS and ClearQuest experience would be an added advantage
Contact Jocelyn Yao
Email Jocelyn.Yao@intel.com
Phone 86-21-38732584
Website www.intel.com/jobs/

NULLSTONE
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Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title Senior Compiler Developer
Posting Date 5/7/2007
Job Location Santa Clara, CA
Description Working with a group of people to develop and tune on Loop, Memory and Data Transformations. Performance headroom analysis for applications and benchmarks.
Qualifications 1) Compiler Optimizations, Parallelization and multi-threading experiences.
2) Familar with Linux and Windows
3) Good communication skills, Fluent in English. Good team player.
4) MS or Ph.D in Computer Science or Engineering
5) The following knowlege is a plus - OPENMP, SMT,SMP, Multi-core.
Contact John Ng
Email john.ng@intel.com
Phone (408) 653-7572
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title Software Engineer
Posting Date 27 April 2007
Job Location Folsom, Ca
Description In this position, you will be joining the Graphics Engineering (GE) Fulsim team and responsible for hardware modeling of all graphics projects. The team designs and develops the 3D/2D/Media C++ pipelines. You will be working on spec definition and algorithm development with architecture team, and owning the software design and validation. This model is the primary reference for graphics and media hardware validation, both pre and post-silicon, and it's also used by the graphics driver team for driver debug and development.
Qualifications You must possess a Bachelor of Science degree or a Master of Science degree in Electrical Engineering, Computer Engineering, Computer Science or a related discipline. Additional qualifications include:
Strong C++ coding skills with practical experience in Object-Oriented programming
Strong written and verbal communication skills
Good knowledge of microprocessors and computer system architecture
Understanding of digital electronics and logic design
Good knowledge of IA-32 architecture, PC Platforms and operating systems
Excellent communication, interpersonal and problem-solving skills
Good planning and strong problem-solving skills
Knowledge in programming and debugging in IA-32 assembly language and Perl and/or Ruby*
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title OpenGL* Device Driver Develper
Posting Date 27 April 2007
Job Location Austin, TX
Description Intel's Visual Computing Group is seeking an OpenGL* Device Driver Developer/3D Driver Engineer who will help us architect and implement features in our OpenGL* drivers. In this position, your responsibilities will include architecture and/or implementation of new features including an opportunity to influence the overall architecture, debugging driver issues, and performance analysis.
Qualifications You must possess a minimum of a Bachelor of Science degree in an appropriate technical discipline. Additional qualifications include:
Working experience in designing and/or developing graphics drivers for Windows* operating systems
Strong familiarity with OpenGL* (either at the application programming level or at the driver level)
Strong software development (C/C++) skills
Strong debug skills under the Windows* platform
Excellent planning, organization, presentation, and communication skills
Ability to deal with highly complex systems and apply analytical problem solving
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title Graphics System Validation Engineer
Posting Date 27 April 2007
Job Location Folsom, Ca
Description In this position, you will be a member of the Graphics System Validation (GfxSV) team, you will be responsible for system-level validation of graphics platform components for the next generation desktop and mobile markets. Tasks include test plan and software development of feature tests used to validate Intel Graphics display functionality with respect to architecture specifications. Your responsibilities will include but not be limited to:

Evaluating pre- and post-silicon validation content and methodologies for Intel Display controller, as well as driving efficiency and coverage improvements into the graphics system validation flow and synchronize graphics hardware validation strategies with Intel Graphics driver implementation

Interacting with architecture, design, system-level simulation, platform, and BIOS engineering, as well as compatibility validation and marketing groups for a high degree of collaboration and leverage in both the pre- and post-silicon validation phases

Developing graphics validation software tools

Qualifications You should possess a Bachelor of Science degree or a Master of Science degree in Computer Science, Computer Engineering, or Electrical Engineering, with three years (one year for Masters) of experience in relevant hardware design/validation and/or software development. (Competent applicants with fewer years of experience will be considered, as will applicants with higher levels of experience). Additional qualifications include:
Solid programming skills in the Linux* or Windows* environment, and in particular: C/C++ programming languages and Perl or Ruby* scripting languages
Knowledge of BIOS, bus protocol (FSB/PCI/PCI-X*), memory subsystems, and hardware and/or software driver integration
Ability to perform under pressure and adapt to changing priorities
Excellent written and verbal communication skills
The following qualifications would be an added advantage:
Familiarity with graphics concepts and usage (VGA, 2D, 3D, execution model)
Familiarity and experience with Intel architecture and silicon debug tools (ITP*, LA*)
Experience with graphics validation (pre- or post-silicon) and/or design, including tools like software models, simulators, and emulators
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title Graphics System Architect
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group is seeking Graphics System Architects in all aspects of graphics development. This includes component architecture, micro-architecture and performance simulation development. In this position, you will be helping to drive requirements for hardware interfaces and influence the software architecture and execution direction.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Additional qualifications include:
Working experience in developing high-performance CPU and graphics platforms
Direct previous experience with CPU and graphics product development
Experience defining micro-architecture specifications given a high-level architecture specification
Knowledge of software-hardware tuning and optimization
Knowledge of performance modeling of complex CPU and graphics architectures
Strong knowledge of current graphics architectures and implementations
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title Graphics Driver Validation Engineer
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group is seeking Graphics Driver Validation Architect/Engineers for components of graphics driver. This includes driver components such as Content Protection, Video/DXVA*, video codecs, image, and color processing, OpenGL*, DirectX*/Direct3D*, Video BIOS, display drives and property control pages.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Additional qualifications include:
Working experience in designing and/or developing and/or testing graphics drivers for Windows* operating systems
Strong knowledge of OpenGL*, DirectX*, DXVA* or display driver at the application programming level
Understanding of test methodologies
Highly technical with very good understand of one of the graphics technologies so that they can drive the creation of a comprehensive test suite to ensure the highest quality drivers
Experience with video BIOS and video display controllers would be an added advantage
Experience with Vista* operating system and TMM* specification would be an added advantage
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title Graphics Driver SW Engineer
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group is seeking Graphics Driver Software Architect/Engineers in all aspects of graphics driver development. This includes driver areas such as Content Protection, Video/DXVA*, video codecs, image, and color processing, OpenGL*, DirectX*/Direct3D*, Video BIOS, engineers with expertise in developing an operating system, property control page engineers, display driver engineers, and simulation environment development.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Additional qualifications include:
Working experience in designing and/or developing graphics drivers for Windows* operating systems
Strong knowledge of OpenGL*, DirectX*, DXVA* or display driver
Experience with video BIOS and video display controllers would be an added advantage
Experience with Vista* operating system and TMM* specification would be an added advantage
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title Front-End Development Engineer
Posting Date 27 April 2007
Job Location Folsom, Ca
Description Intel's Visual Computing Group is seeking Front-End Development Engineer for micro-architecture definition, RTL, and pre-silicon design verification.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Additional qualifications include:
Experience with Specman*
Experience in analog and mixed signal verification and/or validation
Strong familiarity with general computer architecture and x86 ISA
DFTV (Design for test/debug/manufacture) experience
Experience with industry standard RTL and behavioral modeling tools, software and FPGA based simulation
Theory and practice of logic design verification including dynamic and formal methods
Track record of supporting successful designs in high volume manufacture
Strong collaboration and customer orientation skills
Ability to work with geographically dispersed team
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title CMOS Design Automation Eng.
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group (VCG) is seeking CMOS Design Automation Engineers for implementation of Synthesis, APR, back-end design verification and optimization, RAM and register file compilers, front-end development and verification flows.
Qualifications You must possess at least a Bachelor of Science degree (a Master of Science degree and a Ph.D. holders are also encouraged to apply). Additional qualifications include:
Experience in analog circuit design and analysis
Experience in the use of digital design and/or analysis tools including circuit simulators, dynamic and/or static timing analysis, synthesis, and APR
Strong scripting skills in Perl, TCL, or other scripting languages
Experience in the development of flows and methodology to support > 2 GHz design
Track record of supporting successful designs in high-volume manufacture
Collaboration and customer orientation skills
Ability to work with geographically dispersed team
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title CMOS Digital Circuit Designer
Posting Date 27 April 2007
Job Location Folsom, Ca
Description Intel's Visual Computing Group is seeking CMOS Digital Circuit Designers for development of SRAM, ROM, PLA, register file, and high speed arithmetic circuits, as well as cell based blocks of > 500K gates from RTL level description.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Any relevant amount of experience in digital circuit design and analysis is required. Additional qualifications include:
Experience in digital design/analysis tools including circuit simulators, dynamic and/or static timing analysis, power estimation, synthesis and APR
Strong background in > 2 GHz digital design
Strong scripting skills in Perl, TCL, or other scripting languages
Track record of successful designs in high volume manufacture
Strong collaboration skills
Ability to work with geographically dispersed team
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Job Title CMOS Analog Design Engineer
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group is seeking CMOS Analog Design Engineers for development of high speed interfaces including architecture, design and analysis of PLLs, PCIE-genX* design, Graphics DDR genX* and display/video interfaces.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Any relevant amount of experience in analog circuit design and analysis is required. Additional qualifications include:
Experience in analog design/analysis tools including RF simulators and Matlab*
Strong background in high speed serial interfaces (2.5Gb/s is preferred)
Experience writing Micro-Architecture Specifications (MAS), including initial block- level architectures and detailed electrical specifications
Experience with High Speed I/O, VLSI Circuit layout, and PLL circuits
Experience in integrating complex analog blocks in baseline digital process technologies to meet high-volume manufacturing quality standards
Track record of successful analog designs in high volume manufacture
Strong collaboration skills
Ability to work with geographically dispersed team
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com